I'm learning hardware.Point out any errors andrate my autism.
>>109699774>not building gour own 2nm High-NA EUV from scratchNGMI
>>109699774Where did you find this?>>109700020Is this a tool or sum ting?
>>109699985the absolute "rock" bottom of the stack involves mining quartz from the one place on Earth where it's extremely pure (a place in North Carolina) so you can shape it into a crucible to hold molten silicon that you spin into a giant crystal and slice wafers from>>109700020are you rendering a game world or the real one?
>>109700166>findI made it
>>109700181>>109699774where ISA ?
>>109699774SIMD robs
>>109699774>Point out any errors and>rate my autism.Your error was posting about it here. This board is about consumer whoring, not learning.
>>109699774mailbox registers usually are mostly for heterogenous situations right, they are pointless in this picture
>>109701510I'm focusing on typical x86 consumer desktop hardware for now>>109703762which means you're right, typical desktops don't use mailbox registers, thanks. I should replace that with High-Speed Interconnect (Intel Ring Bus, AMD Infinity Fabric) >>109703444I'm not sure what you mean. The ROB is typically unified. Branch mispredictions must lead to invalidation of entire paths, whether they use ALU or SIMD
>>109699774L3 is a cache for memory, so shouldn't there be a line connecting L3 with main memory, probably via the cache controller?
>>109704275thanks. L3 connects to main memory using the High-Speed Interconnect from >>109704102that I will be adding.That interconnect bridges each core, L3, IMC (to RAM), DMI and PCIe controllers, integrated graphics (not drawn), and the System Agent (not drawn)So I now have a few edits to make
>>109700174Why does it need to be natural pure quartz? Can we really not create something equal artificially?
>>109705077From my understanding, molten silicon is so reactive that any other material will induce bonds that result in a bad product. I'm not entirely sure why pure quartz works, other than it's mostly silicon itself
>>109700174You don't need silicon at all, it's posible to make semiconductors using tin oxide (SnO and SnO2), p-type mobility still shit but it can work.
>>109705150that's neat, I've never heard of that. Making a processor out of it is still being explored as a research topic, but apparently tin oxide semiconductors have the potential to be more power efficient than pure silicon. I'm guessing it should be easier to manufacture, too
>>109705200>but apparently tin oxide semiconductors have the potential to be more power efficient than pure siliconNo, not the oxides, but the α-tin (gray tin) it's the hexagonal structure of tin, it's far better than silicon but it's not stable at room temperature.
>>109705029In the diagram in >>109699774 it is stated that the L3 is on th same processor die as the rest. That is not always teh case, and in early versions such as Pentium Pro, the cache was on a separate chip in a multi chip module.Also, the box "L2 cache controllers" lacks connections and seem uperfluous given there is already a "$ctrl".
>>109705200The good part is that you don't need high temperature, you can grow SnO2 (n-type) on top of a layer of SnO (p-type) by exposing it to hydrogen peroxide.
