ACK-SHUALLY it's *designing* edition>What is this and why would I care?Field Programmable Gate Arrays (FPGA) are how poor-fags (<7f plebs) can design a complex IC and test it out QUICKLY at home.You could design a fairly complicated IC for a small project and use the FPGA as an ASIC-lite (with a flash-storage PCB) or to use your design to get an actual IC etched yourself or in a group-funded chip print. (Like https://tinytapeout.com/)The basic process is: HDL -> Yosys -> nextpnr -> FASM.You can also use vendor software from Xilinx etc, but it is very locked down. I would argue it's more convoluted as well.>Open Source Toolchainhttps://f4pga.readthedocs.io/en/latest/getting-started.htmlIcestorm - Lattice Ice FPGAs, ice40 is very cheap and lots of dev boards.Trellis - Lattice ECP5, relatively cheap with more powerX-Ray - Xilinx 7 series, Much more money, but lots of advanced features. Not 100% functionality supported with FOSS.>Verilog/VHDLBoth work, Verilog is said to be easier to learn but VHDL is strongly-typed and harder to make shit code with.General guides and references:https://www.fpga4fun.com/HDLtutorials.htmlTutorial for cheaper boards (zero to risc-v):https://github.com/BrunoLevy/learn-fpga/tree/master/FemtoRV/TUTORIALS>BoardsXilinx Artix-7: Digilent Arty A7, Basys 3, Nexys A7ECP5: ECP5 Versa, TinyFPGA, ULX3SIce40: iCEstick, iCE40-HX8K, UPduino (thanks anon), iCEVision BoardOther boards will work, but flashing them will be a few extra steps with openFPGALoader.Projects from MIT losers:http://web.mit.edu/6.111/volume2/www/f2019/previousterms.htmlThis general has been migrated from /g/ since it was a bit too hardware focused. If it dies again we can try to combine with /ohm/ or /mcu/.What we learned last thread:>No uses uses FPGAs, we are all larping>One anon makes cool machinery controllers for mills/lathes>Finance companies steal our money faster with FPGAs>Hardware engineers get paid shit, better learn python chud
I'll migrate this gem over to reiterate that most of the ASIC oriented jobs will probably have lots of crunchtime and not equivalent pay.
>>2788369>>No uses uses FPGAs, we are all larping>>/g/100057673Thread died before I could reply to that other lad>Don't be a pussy! what is you education / experience / and pay? Describe (generically) your work - like what is the size of the device, the size of your team, and anything you think is interesting. What HDL do you use?Hope you're in this thread buddy. Picrel is where I work.SoC is a deeply embedded ARM core. Not gonna say much more sorry.Team size is around 50 people on hw/dv and 10 on sw (including me). Boot ROM is being written by myself and two other coworkersI have a BSc in Computer Engineering. Day to day I write C, but the design is all in SystemVerilog that I read if I need to look through it.FPGA in use is a very expensive Xilinx based one that is really easy to use.
>>2788402Forgot pic
>>2788402Hey, thanks for finding the thread!I was worried it was fruitless, but I realized you guys are all US based likely and I am japland.Pretty cool to use FPGAs at work. I'm an EE doing mostly controls, so this is all side-learning for me. Is systemV used that much already? My only friend in VLSI world worked for HP back home and it was all ancient techdebt verilog.
>>2788411> Hey, thanks for finding the threadNw buddy, I was joking with my first post but considering you replied so genuinely, Im more than happy to talk about my $job.>I was worried it was fruitless, but I realized you guys are all US based likely and I am japland.Analog is very global! We are in a _lot_ of countries. We actually have a field sales office in Japan, you could get in contact with them about careers if you are a designer looking for work outside of control. The work culture is great too, its a greay place to work.> Is systemV used that much already? My only friend in VLSI world worked for HP back home and it was all ancient techdebt verilog.From the little I have seen, yes. Even a lot of the ARM IP is SV, though some older design files are in rae Verilog. I only learned regular Verilog at school, so I guess the real world is a bit different.What sort of designs have you made with your FPGAs? Anything cool?
>>2788414Yeah, I am genuinely wanting some fpga discussions and to get more into it. >Analog is very global! I would actually be interested, but my current job is so cozy and above 6fig USD that I would be dumb to drop it early. I can do this kind of self-teaching whenever I want. If this fell through it's not a bad plan, but also working in Japan is so sketchy depending on the middle management. Sometimes it's no big deal, but other times you jump into a train. I am lucky to have what I do right now.>What sort of designs have you made with your FPGAs? Anything cool?Not sure about cool, but I am working on a way to integrate an AFR/MAF sensor from my older EFI motorcycle and use that data along with the RPM/Throttle position to adjust my fuel injection on the fly. I realize it's not novel at all, and a Pi could probably do it, but it's been interesting. Aftermarket moto ECUs are weirdly expensive and kind of hard to get here even. I've only really gotten an injector to shoot some fuel and the board to "see" the afr so far. Nothing has run on an fpga yet, but it's a hobby project that I get to when I'm not working or with the family. Motorcycle tuning is not as saturated as car ECUs just yet, probably because it isn't worth decreasing reliability on what is already a plenty fast machine.Everything so far has been self-motivated, though I did have some classes in college way back that used Xilinx chips. Don't remember much at this point though!
>>2788411We mostly use VHDL. The V stands for Very High Speed Integrated Circuit. Let that set the tone for the language.t. yuro
Shit, tiny tapeout is so cool. I've been doing digital designs in minecraft, guess I should actually learn VHDL and do it for real.
>>2788403> not using iso 8601 or derivative date format> legible handwriting, never used keyboard, manga letteringJanitor
>>2788502Might as well!The price/size is not perfect, but you don't have many options for "chip" silicon I think.
>>2788369has anyone tried implementing posit arithmatic yet? is it a meme or is it actually useful?https://www.youtube.com/watch?v=aP0Y1uAA-2Y
>>2788719Very interesting concept. It could be a meme, and it probably is for around 90 percent of users, but anything GPU related may actually want this. My one thought is that the scenarios where it returns an inexact figure instead of NaN may cause strange artifacts. Designers are likely used to getting exact or NaN and will have to design around "inexact" and how much accuracy it loses.Would be a great thesis project I bet.
What's the fastest way to learn verilog as someone who has never done FPGA stuff before?
>>27892471. Have someone tell you that Verilog and VHDL are both simulation languages and as such only subsets of them apply to design synthesis (turning your code into something that can be shoved onto an FPGA or a full-blown ASIC)2. Start conceptualizing everything in terms of mathematically pure boolean functions (implemented as gates in an ASIC, LUTs in an FPGA) and wires to connect those bits to stop gaps (flip-flops) that save the data on the edge of a clock signal.The language itself is largely trivial and you're just gonna use it to express boolean algebra and where you want your flip-flops. The actually difficult part is learning how to design shit, which can vary wildly depending on what you're working with.
>>2789262> implemented as gates in an ASIC, LUTs in an FPGAThe ‘G’ in FPGA is for Gate.It’s more accurate to say the gates are implemented as LUTs.Just as it was commonplace to implement some arbitrary gate logic in, say, PROMs, back in the day.
>>2789447If we're playing the pedantry game then ASICs aren't just made of gates because standard libraries usually contain a ton of more complex cells for efficiency reasons and FPGAs contain entire SRAM blocks, full adders with prefix networks, and so on. Synthesis doesn't really deal in terms of gates unless you consider arbitrary size truth tables to be "gates."
>>2789711> arbitrary truth tables are gatesYes, that’s certainly true… without even considering things like Hi-Z tri-state logic where it becomes apparent that a ‘gate’ is more of a super-set.
>>2789845Your AND gate has aids
>>2788402That was me; glad I found this thread. Thanks for responding, very cool.
>>2789262>Start conceptualizing everything in terms of mathematically pure boolean functionsYou make that sound a little scary; Here is a simple example.This will be a moore type state machine where the outputs depend solely on the internal state, there are also mealy state machines that have combinatorial logic connected to inputs in the output path. Anyway.Just start out with a single state machine and a timer. The counter forms the delay between lights. The state machine is GREEN YELLOW and RED. In each of the three states one of the outputs is wired high and the others are wired low. Define your timer to increment on every clock tick and if the timer is say all 1's, let it roll over to all zero's and change the color state to the next one. Probably add a little reset logic and you are done.
>>2790591You of course could define this in a more low-level way, but the synthesis tools will understand a state machine defined in this high level fashion and choose how to implement it.
What is the /absolute cheapest/ board I could get if I just want to dabble around and blink an LED or something?
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